我在VHDL中有一个非常简单的运算符问题。我尝试将一些输入与逻辑运算符进行比较,但得到错误消息...逻辑运算符问题VHDL
entity test is
port (
paddr : in std_logic_vector(15 downto 0);
psel : in std_logic;
penable : in std_logic;
pwrite : in std_logic
);
end entity test;
signal wrfifo_full : std_logic;
process (paddr, psel, penable, pwrite, wrfifo_full) is
begin
if (((paddr(8 downto 2) = "1000000")) and (psel and penable) and (pwrite and not(wrfifo_full))) then
dt_fifo_wr_i <= '1';
else
dt_fifo_wr_i <= '0';
end if;
end process;
Unfortuantely,我得到那么下面的错误消息:
如果(((PADDR(8 DOWNTO 2)= “1000000”))和(PSEL和PENABLE)和(PWRITE而不是(wrfifo_full)))然后 | ncvhdl_p:* E,OPTYMM(HDL/VHDL/test.vhd,523 | 43):操作者参数类型不匹配87 [4.3.3.2] 93 [4.3.2.2] [7.2]
反正看到的问题?
干杯
谢谢你们,现在的工作!请记住这一点! – Martin 2010-10-26 12:43:05
太好了,你可以请标记回答的问题吗? – George 2010-10-26 12:53:31